Cadence University Program Member
CADENCE Tutorials
at the
ECE Department
Wayne State University

    ECE7530 Advanced Digital VLSI Design: VHDL



       Lecture Notes

        1.  Introduction

        2.  VHDL Data Types


        4.  Structural Modeling

        5.  VHDL OPERATORS

        6.  Model Structure

        7.  Sequential Machine VHDL Implementation

        8.  Resolving Multi-Signal Drivers

        9.  Data Objects

        10. LOOPING Constructs

        11. Chip Level Modelling

        12. Digital Design

        Appendix:  IEEE package

Lab Handouts

1. VHDL Design Coding, Compilation, and Simulation
2. VHDL Code Synthesis Using Ambit BuildGates
3. VHDL Layout Generation Using Silicon Ensemble
4. Comparing Adder with Different Architectures
5. Structural Modeling Using Regular Structure
6. VHDL Up/Down Counter Design
7. VHDL 16-Bit Shift Register
8. 16 Bit Arithmetic/Logic Unit Design
9. VHDL Datapath Design

Appendix:  Reading data from a text file

Course Project 

group assignment



All information obtained from this and all attached pages comes with a disclaimer. Cadence is a trademark of Cadence Design Systems, Inc., 555 River Oaks Parkway, San Jose, CA 95134.